1. SylabUZ
2. Wydział Informatyki, Elektrotechniki i Automatyki
3. semestr zimowy 2018/2019
4. WIEiA - oferta ERASMUS / Informatyka - Program Erasmus pierwszego stopnia
5. Digital system design

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Digital system design - opis przedmiotu

Cel przedmiotu

• To provide basic knowledge about principles of fundamental Boolean and their application to digital design.
• To provide basic knowledge about combinational and sequential digital/logic circuits, and modular design techniques.
• To provide basic knowledge about data path and control unit design, and memory.
• To give basic skills in analysis and synthesis of logic circuits.

Wymagania wstępne

Zapisz zmiany

Mathematical foundations of engineering, Logic for computer science, Experiment methodology I, Computer architecture I

Zakres tematyczny

Digital Computers and Information. Binary signals. Number systems, operations, and conversions: decimal, binary, octal, hex. Codes: BCD, parity, Gray. Combinational Logic. Logic gates. Logic functions. Standard forms: minterms/maxterms, SoP, PoS. Karnaugh maps. Two-level/Multilevel circuit optimization and implementations. Combinational Functions and Circuits. Decoders/Encoders. Multiplexers, implementation. Iterative Circuits. Binary Adder/Subtractors.

Sequential Circuits. Latches. Flip-flops. Finite State Machines. Mealy vs. Moore machines. Sequential Circuit Design: state assignment, designing with D and JK flip-flops. Registers. Registers with Load Enable and with Parallel Load. Register Transfers. Shift Registers, Shift Registers with Parallel Load, Bidirectional/Universal Shift Registers. Counters. Ripple Counters. Synchronous Binary Counters: design with D and JK flip-flops. Binary Up-Down Counter. Binary Counter with Parallel Load. BCD and Arbitrary Sequence Counters. Modulo N counters.

Introduction to VHDL Language.

Metody kształcenia

• Lecture, laboratory exercises.

Efekty uczenia się i metody weryfikacji osiągania efektów uczenia się

Opis efektu	Symbole efektów	Metody weryfikacji	Forma zajęć

Warunki zaliczenia

• Lecture – the passing condition is to obtain a positive mark from the final test.
• Laboratory – the passing condition is to obtain positive marks from all laboratory exercises to be planned during the semester.
• Calculation of the final grade: lecture 50% + laboratory 50%

Literatura podstawowa

1. R.H.Katz, G.Borriello: Contemporary Logic Design, 2nd Edition, Pearson Education, 2005
2. K.Skahill: VHDL for Programmable Logic, Addison-Wesley Publishing, 1996
3. J.F.Wakerly: Digital Design, Principles and Practices, 4th Edition, Prentice-Hall, 2005
4. Μ.Μ.Mano, M.D.Ciletti: Digital Design, 4th Edition, Prentice-Hall, 2007\
5. M.Zwolinski: Digital System Design with VHDL, 2nd Edition, Prentice-Hall, 2003

Literatura uzupełniająca

Uwagi

Zmodyfikowane przez dr inż. Michał Doligalski (ostatnia modyfikacja: 04-04-2018 00:10)