SylabUZ
Course name | Embedded systems design |
Course ID | 06.0-WE-INFD-ESD-Er |
Faculty | Faculty of Computer Science, Electrical Engineering and Automatics |
Field of study | Computer Science |
Education profile | academic |
Level of studies | Second-cycle Erasmus programme |
Beginning semester | winter term 2021/2022 |
Semester | 2 |
ECTS credits to win | 5 |
Course type | optional |
Teaching language | english |
Author of syllabus |
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The class form | Hours per semester (full-time) | Hours per week (full-time) | Hours per semester (part-time) | Hours per week (part-time) | Form of assignment |
Lecture | 30 | 2 | - | - | Exam |
Laboratory | 30 | 2 | - | - | Credit with grade |
Trends on the electronics market, especially integrated systems. The role of systems embedded in modern electronics. An integrated approach to designing as new quality in relation to traditional methods. Basic design stages integrated: specification, translation into a formal model, modeling, verification, co-simulation, decomposition, implementation of hardware and software parts. Specification microprocessor systems at the system level. Application of description languages hardware (VHDL, Verilog, etc.) and programming (C / C ++, Java, etc.) for system representation
hardware and software. Formal models used in integrated design: requirements and features of models. Discussion of the most important types of models. architecture integrated systems (typical elements of architecture, a typical architecture template, coprocessor operating mode, cost of HW / SW interface). Specialized hardware processors (FPGA / CPLD) and software (ASIP).
lecture: conventional lecture
laboratory: group work, practical classes, laboratory exercises
Outcome description | Outcome symbols | Methods of verification | The class form |
Embedded System Design, fourth edition, Springer Nature Switzerland AG, 2021, ISBN: 303060909X
Ashenden P., Digital Design (VHDL) An Embedded Systems Approach Using VHDL, Morgan Kaufmann, 2007
Modified by dr inż. Michał Doligalski (last modification: 08-09-2021 21:13)