SylabUZ
Course name | Hardware control systems |
Course ID | 06.2-WE-AutP-HCS-Er |
Faculty | Faculty of Computer Science, Electrical Engineering and Automatics |
Field of study | WIEiA - oferta ERASMUS / Automatic Control and Robotics |
Education profile | - |
Level of studies | First-cycle Erasmus programme |
Beginning semester | winter term 2018/2019 |
Semester | 5 |
ECTS credits to win | 3 |
Course type | optional |
Teaching language | english |
Author of syllabus |
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The class form | Hours per semester (full-time) | Hours per week (full-time) | Hours per semester (part-time) | Hours per week (part-time) | Form of assignment |
Lecture | 15 | 1 | - | - | Credit with grade |
Laboratory | 30 | 2 | - | - | Credit with grade |
Fundamentals of digital and microprocessor technology; Discrete process control
Get acquainted with elementary digit systems. Basic logic gates. Basic digital flip-flops. Combined and sequential digital functional blocks (multiplexers, decoders / demultiplexers, counters, registers, memories). Decomposition of the digital circuit into the control and operating part. Methods of description of control and operating parts of the digital circuit. Cooperation of the operating system with the control system. Design of combination and sequential control systems using digital functional blocks. Design of digital control circuits using PLD, CPLD and FPGA programmable logic structures (introduction, internal design of PLD, CPLD and FPGA systems, design examples). Introduction to digital circuit design using hardware description languages (general VHDL model structure, VHDL VHDL example, VHDL language features, VHDL applications). Basic issues of VHDL language (model structure, data objects, data types).
Specification of digital behavior using process instructions (process structure, sensitivity list, basic sequential VHDL instructions, for example conditional statements and loops). Specification of the structure description of the digital system in VHDL (structural description elements, configuration instruction, replication statement, test procedure elements, test component instance, test vectors definition, assertion statement). Designing digital IPs (Intellectual Property) using VHDL. Application of VHDL language and programmable logic structures (PLD, CPLD and FPGA) in the design of digital control circuits
Lecture: Conventional / Traditional Lecture
Laboratory: laboratory exercises using computer hardware
Outcome description | Outcome symbols | Methods of verification | The class form |
Lecture - a condition of credit is to obtain positive grades from written or oral tests conducted at least once in a semester
Laboratory - a condition of credit is to obtain positive grades from all laboratory exercises, intended to be implemented within the laboratory program
Components of the final grade = lecture: 50% + laboratory: 50%
Modified by dr hab. inż. Wojciech Paszke, prof. UZ (last modification: 01-05-2020 17:08)